The present inventive concept herein relates to a memory device and a method of manufacturing the same, and more particularly, to a variable resistance memory device and a method of manufacturing the same.
Semiconductor memory devices have steadily improved in speed and cost-per-bit over many generations of technology. Moore's Law, the idea that the density of integrated circuits may double approximately every two years, has generally held true in the field of semiconductor memories for nearly fifty years. However, as device sizes shrink, there is some concern that integrated circuits in general, and semiconductor memory devices in particular, may be fast-approaching fundamental limitations on device density. Semiconductor memory devices that continue to scale down to sub 20 nm geometries would therefore be highly desirable. Semiconductor memory devices that, unlike dynamic random access memories (DRAMs), retain information even when power is withdrawn (i.e., they are non-volatile), would also be highly desirable. Some candidates for next generation semiconductor memory devices include: ferroelectric random access memory (FRAM), magnetoresistive random access memory (MRAM) and phase change random access memory (PRAM). Some next generation memory devices include materials that present different resistance values, depending upon applied voltage and current profiles, for example. Once programmed to a particular memory state, the device tends to remain in that state, even when power is withdrawn from the device. That is, such a resistance-based memory device may be non-volatile. Additionally, variable resistance memory devices, such as PRAM devices, may exhibit high operation speeds and, with a potential for very small features sizes, may provide very high degrees of integration, and systems and methods to develop PRAM devices would therefore be highly desirable.